Andreas G. Andreou

Johns Hopkins University

Monday March 6 18:00-19:00

“Neurochiplets and Silicon Brains in 3D CMOS”

The brain is without doubt the world’s most powerful computer for solving problems in machine perception (vision, speech, language) and machine learning. Brains exist in 2+delta -dimensional physical space yet are capable of efficiently solving problems in higher dimensional spaces. We believe that the network structure of the brain architecture in 2+delta dimensional space contributes significantly to its effectiveness and energy efficiency in cognition. At all levels of the central nervous system, from retina to the cortex, the tissue is organized in a hierarchy of layers. In certain layers there is an abundance of axons, the physical structures in neurons responsible for communication” while others are densely packed with cell bodies and dendrites, or what one will consider as the computational” structures in the tissue. Furthermore, the layers are tightly coupled vertically through what is termed in biology a column”. Over the last half century computer scientists, architects and engineers have envisioned building computers that match the parallel processing capabilities of biological brains for perception and cognitive computing.

Three-dimensional integration through wafer stacking and 2.5D assembly is an alternative to technology scaling and monolithic integration that achieves increase in the number of transistors and short-range interconnect per unit area thus improving energy efficiency. To addres the challenges of rapid and flexible prototyping of large bioinspired systems for cognitive computing we abstract the 2+delta brain architectonics provide a guidance towards future development of silicon integrated systems for machine perception and learning that would be as effective and as efficient as biological brains. Neurochiplets SOC 2.5D architecture relies on this alternative approach to scaling, driven primarily by cost and flexible and rapid system level integration. 2.5D integration on a silicon interposer will interface the memory to neuromorphic chiplets and a commodity FPGA and processors (RISC-V) for operating system support and data I/O. In this talk I will discuss the design of three generations of bio-inspired 3D CMOS SOCs designed over a period of 15 years. I will present experimental data from the architectures and discuss successes and failures.


Andreas G. Andreou is a professor of electrical and computer engineering, computer science and the Whitaker Biomedical Engineering Institute, at Johns Hopkins University. Andreou is the co-founder of the Johns Hopkins University Center for Language and Speech Processing. Research in the Andreou lab is aimed at brain inspired microsystems for sensory information and human language processing. Notable microsystems achievements over the last 25 years, include a contrast sensitive silicon retina, the first CMOS polarization sensitive imager, silicon rods in standard foundry CMOS for single photon detection, hybrid silicon/silicone chip-scale incubator, and a large-scale mixed analog/digital associative processor for character recognition. Significant algorithmic research contributions for speech recognition include the vocal tract normalization technique and heteroscedastic linear discriminant analysis, a derivation and generalization of Fisher discriminants in the maximum likelihood framework. In 1996 Andreou was elected as an IEEE Fellow, “for his contribution in energy efficient sensory Microsystems.”


Leandro Stefanazzi


Tuesday March 7 18:00-19:00

“A mover los Qubits”

En esta charla, vamos a hablar de computación cuántica y sobre todo de qubits. Estos qubits son la unidad de información básica para la computadora cuántica, y requieren de técnicas de control avanzados para lograr su correcta manipulación. La teoría de física cuántica respalda la evolución de estos sistemas, aunque esta vez nos vamos a concentrar en la electrónica, las señales y todo lo que se requiere para moverlos. El sistema llamado QICK (Quantum Instrumentation and Control Kit), desarrollado en Fermilab, es uno de los sistemas de lectura elegidos por universidades como University of Chicago, Stanford, Berkeley, Princeton, etc, asi como también laboratorios nacionales de Estados Unidos. Vamos a ver como funciona con una demostración práctica.


Leandro Stefanazzi es Ingeniero Electrónico graduado de la Universidad Nacional del Sur, Bahia Blanca, Argentina. En 2008 recibió su titulo de Magister en Control de Sistemas y en 2013 de Doctor en Ingeniería, ambos en la Universidad Nacional del Sur. Actualmente trabaja en temas de procesamiento digital de señales y diseño digital, radio frecuencia y bajo ruido. Desde 2018 y hasta la actualidad trabaja en Fermilab, Laboratorio Nacional del Departamento de Energía de Estados Unidos, en donde desarrolla sistemas de control y lectura de Qubits en colaboración con diversos organismos de investigación.

Ljiljana Trajkovic

Simon Fraser University

Wednesday March 8 18:00-19:00

“Machine Learning for Detecting Internet Traffic Anomalies”

Border Gateway Protocol (BGP) enables the Internet data routing. BGP anomalies may affect the Internet connectivity and cause routing disconnections, route flaps, and oscillations. Hence, detection of anomalous BGP routing dynamics is a topic of great interest in cybersecurity. Various anomaly and intrusion detection approaches based on machine learning have been employed to analyze BGP update messages collected from RIPE and Route Views collection sites. Survey of supervised and semi-supervised machine learning algorithms for detecting BGP anomalies and intrusions is presented. Deep learning, broad learning, and gradient boosting decision tree algorithms are evaluated by creating models using collected datasets that contain Internet worms, power outages, and ransomware events.



Ljiljana Trajkovic received the Dipl. Ing. degree from University of Pristina, Yugoslavia, the M.Sc. degrees in electrical engineering and computer engineering from Syracuse University, Syracuse, NY, and the Ph.D. degree in electrical engineering from University of California at Los Angeles. She is currently a professor in the School of Engineering Science, Simon Fraser University, Burnaby, British Columbia, Canada. Her research interests include communication networks and dynamical systems. She served as IEEE Division X Delegate/Director, President of the IEEE Systems, Man, and Cybernetics Society, and President of the IEEE Circuits and Systems Society. Dr. Trajkovic serves as Editor-in-Chief of the IEEE Transactions on Human-Machine Systems and Associate Editor-in-Chief of the IEEE Open Journal of Systems Engineering. She is a Distinguished Lecturer of the IEEE Circuits and System Society, a Distinguished Lecturer of the IEEE Systems, Man, and Cybernetics Society, and a Fellow of the IEEE.


Harald Pretl

Johannes Kepler University

Thursday March 9 10:00-11:00

“Open-Source IC Design—Why You Should be Interested”

This talk reviews the latest developments in open-source tools for integrated circuit design, how to participate in these activities or design an own IC at a low cost, and how these actions might benefit the semiconductor research and development communities.


Harald Pretl is a full professor heading the Institute for Integrated Circuits (IIC) at the Johannes Kepler University Linz, Austria, where he directs the Energy-Efficient Analog Circuits & Systems Group and acts as a co-lead of the LIT/SAL mmWave Lab. After spending 25 years developing commercial and academic integrated circuits using standard commercial closed-source tools, he has recently found an interest in using open-source tooling. Harald is the lead developer of the IIC-OSIC-TOOLS, an open-source IC design environment. Harald is also a member of the IEEE SSCS Technical Committee on the Open Source Ecosystem.

Peter Kennedy

University College Dublin

Thursday March 9 18:00-19:00

“Recent Advances in Frequency Synthesis”

Frequency synthesizers are universally used in a wide range of applications including
clocking, communications, instrumentation, and radar. The most common architecture is
the fractional-N frequency synthesizer which uses a nonlinear finite state machine to
produce the desired frequency. Both the finite state machine itself and interaction between
its output and nonlinearities in the implementation can lead to unwanted spurious periodic
output frequency components (spurs) and excess noise. Understanding of the origins of
these effects has led to the design of novel mitigation strategies.
This talk will explain the underlying issues, explain some recent innovations, and highlight
open problems.



Michael Peter Kennedy received the B.E. degree in electronics from the National University of Ireland, Dublin, the M.S. and Ph.D. degrees from the University of California, Berkeley,
and the D.Eng. degree from the National University of Ireland. He has published and
lectured on a range of topics in the field of nonlinear circuits and systems including
oscillators, chaos, neural networks, mixed-signal testing, phase-locked loops, delta-sigma
modulation and frequency synthesis. He was made an IEEE Fellow in 1998 for his
contributions to the study of Neural Networks and Nonlinear Dynamics. He was awarded
the IEEE Third Millennium Medal, the IEEE Circuits and Systems Society Golden Jubilee
Medal, and the RIA Parsons Medal. He has held faculty positions at University College Cork,
where he also served as Vice-President for Research and Innovation, and University College
Dublin, where he is currently Professor of Microelectronic Engineering. He has had visiting
appointments at BME, EPFL, Imperial College London, and the University of Pavia. He has
provided consulting services to a number of semiconductor companies and was founding
Director of Ireland’s Microelectronics Industry Design Association and the Microelectronic
Circuits Centre Ireland. He served as President of the Royal Irish Academy from 2017 to

Jorge Marín

Universidad Tecnica Federico Santa Maria, Valparaiso, Chile

Friday March 10 9:00-9:45

“Robust and area-efficient time-based CMOS sensor interfaces for IoT applications”

Sensors are at the core of the IoT revolution driven by the current scientific and technological advances. By using autonomous, knowledge- and sensor-based, self-regulating systems with nearly-zero failure rates, these technologies aim to disruptively change human activities including transportation, food production, health, industrial manufacturing and environmental monitoring. With the end of the CMOS scaling era approaching, the high energy efficiency and robustness at low cost required by these new sensor applications are becoming more difficult to achieve. Therefore, novel sensing signal processing and conversion strategies are needed that are compatible with the current system requirements and the emerging electronic fabrication technologies. This presentation will focus on time-based circuits and architectures for sensor applications which, due to their highly-digital nature, result in very small chip areas and good process scalability. Modern sensor systems are used in environments ranging from indoor domestic applications to harsh contexts, such as automotive systems, industrial monitoring and space missions. Therefore, another relevant topic in this tutorial is the design of CMOS time-based sensor interfaces that have an inherent robustness and can detect and compensate for the environmental impacts on their operation. The discussion will be centered around fundamental principles, relevant topologies and architectures, and post-silicon case studies of closed-loop time-based sensor interfaces. The last part will include current developments based on an open-source PDK and design toolkit available from the Google-Skywater-Efabless program.


Short-bio: Jorge Marin was born in 1982 in Santiago, Chile. He received the B.Sc. and M.Sc. in electrical engineering from the University of Chile in 2007 and 2010, respectively. He received the M.Sc. and Ph.D. degrees in electrical engineering from the KU Leuven, Leuven, Belgium. He is currently a Post-Doctoral Research Fellow at the Advanced Center for Electric and Electronic Engineering (AC3E), Universidad Tecnica Federico Santa Maria, in Valparaiso, Chile. His current research interests include the design of robust mixed-signal ICs for data conversion and sensor interfacing, and the design of efficient and robust power management integrated circuits.

Víctor Grimblatt

Synopsys Chile

Friday March 10 18:00-19:00

“Agribusiness impact on climate change and climate change impact on agribussiness”

The world is going into a disaster if no actions are taken soon to stop the global warming and the corresponding climate change. Agribusiness is responsible for almost a third of the greenhouse gas emissions (GHG).
On the other hand, agribusiness is one of the most affected sectors by climate change. Technology should play an important and essential role as it provides ways to measure and analyze data that will show GHG emissions for example and can also help defining actions to be taken and, in some cases, automating the actions. In this talk we will analyze the different ways Agribusiness is affecting climate change and the technologies that could help to mitigate the change.



Victor Grimblatt es ingeniero en microelectrónica del Institut Nationale Polytechnique de Grenoble (INPG – Francia) e ingeniero civil electrónico de la Universidad Técnica Federico Santa Maria (Chile). Obtuvo su doctorado en Electrónica en Octubre 2021en la Universidad de Bordeaux, Francia. Es actualmente Director y Gerente General de Synopsys Chile, líder en Automatización de Diseño Electrónico (EDA – Electronic Design Automation). Abrió el centro de I+D de Synopsys en 2006. Tiene conocimientos y experiencia en tecnología y negocios y comprende cabalmente las tendencias de la industria electrónica. Es a menudo consultado sobre desarrollo de nuevos negocios tecnológicos.

Tiene diversas publicaciones en IoT, EDA y desarrollo de sistemas embebidos. Desde 2007 es invitado a diversas conferencias regionales (Argentina, Brasil, Chile, México, Perú y Uruguay) para exponer sobre Diseño de Circuitos, EDA, y Sistemas Embebidos. De 2006 a 2008 fue miembro del Comité Chileno de Exportación de Servicios (Offshoring) organizado por el Ministerio de Economía. En 2010 recibe el premio de innovador del Año en Exportación de Servicios. Es miembro de diversos Comités Técnicos de Programas en Diseño de Circuitos y Sistemas Embebidos. Desde 2012 preside el capítulo chileno de la Sociedad de Circuitos y Sistemas de la IEEE. Es Presidente de la Asociación de la Industria Eléctrica y Electrónica AIE desde 2016. Desde 2021 es miembro del Directorio (Board of Governors) de IEEE CAS

Sus áreas de interés e investigación son EDA (Electronic Design Automation), y Agricultura de precisión donde aplica conceptos de Machine Learning, Inteligencia Artificial e IoT.


(Coming soon)